(1) Field of the Invention
This invention relates to a semiconductor memory and, more particularly, to a semiconductor memory having the function of protecting data stored in a nonvolatile semiconductor memory.
(2) Description of the Related Art
Some of semiconductor memories, such as flash memories, including an electrically rewritable and erasable nonvolatile memory have the function of protecting data stored in a nonvolatile semiconductor memory (nonvolatile memory), such as an electrically erasable programmable read only memory (EEPROM) (see, for example, Japanese Unexamined Patent Publication No. 2001-51904 (FIG. 3)) to prevent important data from being lost due to writing or erasing caused by false operation.
Conventional semiconductor memories having the function of protecting data can be divided broadly into the following two categories.
Conventional semiconductor memories which belong to one category include a 1-bit nonvolatile store section (which will be described later with a nonvolatile bit) for specifying the protection state of a nonvolatile memory.
FIG. 10 is a schematic view for describing data protection by the use of a nonvolatile bit.
In this example, data protection in a nonvolatile memory 100a made up of four sectors (a sector is an erase unit) is shown.
As shown in FIG. 10, nonvolatile bits NBa0, NBa1, NBa2, and NBa3 for specifying the protection state of data in sectors 0, 1, 2, and 3, respectively, are included.
It is assumed that if a write state (“1”) is specified by the nonvolatile bits NBa0 through NBa3, then data in the sectors corresponding to them is protected and that if an erase state (“0”) is specified by the nonvolatile bits NBa0 through NBa3, then data in the sectors corresponding to them is not protected.
The nonvolatile bits NBa0 through NBa3 are written individually and are erased in block.
FIG. 11 is a flow chart showing the flow of a conventional process performed when data is written to a sector protected by a nonvolatile bit.
For example, to write data to the protected sector 0 in the nonvolatile memory 100a shown in FIG. 10, first of all the protection of the sector 0 must be canceled. In this case, information in the nonvolatile bits NBa0 through NBa3 for specifying the protection state of the sectors 0 through 3, respectively, is first stored temporarily in a random access memory (RAM) (S10). Next, to prevent the nonvolatile bits NBa1, NBa2, and NBa3 which are not in a write state from being overerased, preprogramming is performed (S11). After that, the nonvolatile bits NBa0 through NBa3 are erased in block (S12). As a result, the protection of the sector 0 is canceled and data is written to the sector 0 (S13). Afterwards, the sector 0 is protected again. To be concrete, after writing is completed, the information in the nonvolatile bits NBa0 through NBa3 stored in the RAM is read (S14), the nonvolatile bit NBa0 corresponding to the sector 0 is written again to protect the sector 0 (S15), and the process terminates.
In the above process, a time-out of about (150[μs]×number of bits) will occur in step S11. A time-out of about 1.5 ms will occur in step S12. There will be waiting time expressed in milliseconds after step S12 being completed and before the writing of data in step S13 being begun. Moreover, a time-out of about 150 μs will occur in step S15.
Therefore, in many cases, a nonvolatile bit for protecting data is used mainly for protecting a boot code the protection state of which is set only once before being implemented on a system substrate on the user side and which will not be rewritten.
Conventional semiconductor memories which belong to the other category include a 1-bit volatile protection state specification section (volatile bit) for determining the protection state of a sector.
FIG. 12 is a schematic view for describing data protection by the use of a volatile bit.
In this example, data protection in a nonvolatile memory 100b made up of four sectors (a sector is an erase unit) is shown.
As shown in FIG. 12, volatile bits VBa0, VBa1, VBa2, and VBa3 for specifying the protection state of data in sectors 0, 1, 2, and 3, respectively, are included.
When a write state (“1”) is specified by the volatile bits VBa0 through VBa3, then data in the sectors corresponding to them will be protected. If an erase state (“0”) is specified by the volatile bits VBa0 through VBa3, then data in the sectors corresponding to them will not be protected.
The volatile bits VBa0 through VBa3 are written or erased individually. When power is turned off, information indicative of the protection state of a sector will be lost. If the volatile bits VBa0 through VBa3 are used, writing will not involve waiting time. This enables a frequent change in the protection state of a sector.
Furthermore, there are semiconductor memories in which the rewriting of the protection state of data described above is restricted by the use of a password.
FIG. 13 is a schematic view showing an outline of a conventional semiconductor memory in which the protection state of data is changed by the use of a password.
In this example, data protection in a nonvolatile memory 100c made up of four sectors is shown. This is the same with FIGS. 10 and 12.
This semiconductor memory includes volatile bits VBb0, VBb1, VBb2, and VBb3 corresponding to sectors 0, 1, 2, and 3, respectively, and nonvolatile bits NBb0, NBb1, NBb2, and NBb3 corresponding to the sectors 0, 1, 2, and 3, respectively. The logical sum of VBb0 and NBb0 is found out by the use of an OR circuit 200 to determine the protection state of data in the sector 0. Similarly, the logical sum of VBb1 and NBb1 is found out by the use of an OR circuit 201 to determine the protection state of data in the sector 1. The logical sum of VBb2 and NBb2 is found out by the use of an OR circuit 202 to determine the protection state of data in the sector 2. The logical sum of VBb3 and NBb3 is found out by the use of an OR circuit 203 to determine the protection state of data in the sector 3.
In addition, the semiconductor memory includes a volatile bit VBSa for security which locks the state of the nonvolatile bits NBb0 through NBb3 and two nonvolatile bits NBSPa (for password mode) and NBSNa (for non-password mode) for security which determine the initial state of the volatile bit VBSa. When the nonvolatile bit NBSPa indicates a write state, password mode is set and the volatile bit VBSa for security indicates a write state. A password must be inputted to erase it. On the other hand, when the nonvolatile bit NBSNa indicates a write state, the initial state of the volatile bit VBSa at the time of power being applied is an erase state (“0”). Therefore, writing or erasing can be performed without a password being inputted.
However, if nonvolatile bits are used for protecting data, in essence, erasing will take much time and a certain number of bits will be erased in block because of limitations of die size. Therefore, this method is not appropriate to cases where a protection function must be rewritten frequently.
If volatile bits are used for protecting data, a protection state can be changed in real time. However, when power is turned off, they will return to the initial state. Therefore, data protection is insufficient and there is a danger that data in a nonvolatile memory will be rewritten wrongfully by a third party.
With the conventional semiconductor memories in which bits for security are used, sufficient security is provided because the state of nonvolatile bits for protecting data is locked. However, it is difficult to frequently change a protection state on a system.